> For the complete documentation index, see [llms.txt](https://zeju.gitbook.io/lcm-team/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://zeju.gitbook.io/lcm-team/forgeeda/editor.md).

# Introduction

ForgeEDA is an open-source, multifaceted dataset comprising 1,189 practical circuit designs across 6 categories: Processor, Arithmetic, Encoder/Decoder, Interface, Controller. ForgeEDA includes diverse circuit representations such as Register Transfer Level (RTL) code, Post- mapping (PM) netlists, And-Inverter Graphs (AIGs), and placed netlists, enabling comprehensive analysis and development.

<figure><img src="https://204291402-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FqpjfvyQt0RAeOzMVWp4g%2Fuploads%2F8ZJxAZ7f71obs1cLvC7n%2Fimage.png?alt=media&amp;token=bac2a05d-316f-4694-8ad0-70cf9c077251" alt=""><figcaption></figcaption></figure>